🌟 Hello Fellow Verification Engineers! 🌟 Let’s talk about the secret sauce that fuels verification excellence – the power of our thought process! As experts in our field, we understand that practical approaches...
Tag - Verification
In the world of semiconductor design and verification, the Universal Verification Methodology (UVM) has become the industry standard for coverage-driven verification (CDV). CDV aims to ensure that all parts of a design are...
As an engineer, debugging complex issues can be one of the most challenging tasks we face on a daily basis. When a problem arises, it can be tempting to jump in and start looking for the solution right away. However, taking a...
As RISC-V processor development matures and the core’s usage in SoCs and microcontrollers grows, engineering teams face new verification challenges related not to the RISC-V core itself but rather to the system based on or...
With innovations in technologies and methodology, the benefits of formal functional verification apply in many more areas. If we understand the characteristics of areas with high formal applicability, we can identify not only...
Interrupt handling is a well-known feature of any SoC which usually comprises of CPU, Bus Fabric, several Controllers, Sub-Systems & many IP blocks as part of it. In some way or other Interrupts are used to act as...
How to connect the DUT to the UVM Testbench?? In our traditional directed Testbench environments, all the components are “static” in nature & information (data/control) is also exchanged in the form of...
Introduction As technologies advance, we see increasingly complex SoCs in the market, SoCs that have various wireless modules, and processors that use new bus architectures to communicate with them. They can also have various...
Today let’s talk about UVM RAL. In this post, I will introduce – What is RAL? and Why RAL is needed? and How the UVM RAL structure looks like? We know that our DUT (be it an SoC or Subsystem or Design Block) contains a...
As AXI protocol and Cache Coherency are commonly used concepts these days in almost each and every complex SoC’s so knowledge of those concepts are must for everyone to know how it works. All AXI and Cache...