Callbacks Vs Factory

Callbacks and factory both addresses different areas of reusability in UVM.


  • Add functionality to existing logic.
  • Suitable for rare or minimal feature need to be enhanced in focus
  • Popular for error injection/to corrupt the sequence from VIP.
  • Easy to maintain callbacks


  • It used to substitute the existing component before build, keeps environment same.
  • Suitable for so many features need to be enhanced in focus.
  • Multiple copies are required
  • Not suitable for VIP components

As the callback and factory can be interchangeably used to address the same problem. Depending on the requirement, a wise decision should be made on which feature the user should use.

About the author

The Art of Verification

Hi, I’m Hardik, and welcome to The Art of Verification.

I’m a Verification Engineer who loves to crack complex designs and here to help others commit to mastering Verification Skills through self-learning, System Verilog, UVM, and most important to develop that thought process that every verification engineer should have.

I’ve made it my mission to give back and serve others beyond myself.

I will NEVER settle for less than I can be, do, give, or create.

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